//1.Disconnect the PLL with one feed sequence if PLL is already connected.
    PLLCON    &= ~0x02;                                        
    
    PLLFEED    = 0xAA;        //Write the feed sequence
    PLLFEED    = 0x55;    

    //2.Disable the PLL with one feed sequence.
    PLLCON    &= ~0x01;
                                
    PLLFEED    = 0xAA;        //Write the feed sequence
    PLLFEED    = 0x55;
                                        
    //3.Change the CPU Clock Divider setting to speed up operation without the PLL, if
    //desired.    

    /*...*/

    //4.Write to the Clock Source Selection Control register to change the clock source.
    CLKSRCSEL = 0x01;     //Selects the main oscillator as the PLL clock source.
    SCS    &= ~0x00000010;    //The frequency range of the main oscillator is 1MHz to 20MHz.
    
    SCS    |=    0x00000020;    //The main oscillator is enabled
       
    while (OSCSTAT)     //Wait for it to settle
    { }

    //5.Write to the PLLCFG and make it effective with one feed sequence. The PLLCFG can
    //only be updated when the PLL is disabled.
            
    PLLCFG  = 0x00000006; //Set the PLL M and N constants

    PLLFEED    = 0xAA;          //Write the feed sequence
    PLLFEED    = 0x55;

    //6.Enable the PLL with one feed sequence.
    PLLCON |= 0x01;

    PLLFEED    = 0xAA;          //Write the feed sequence
    PLLFEED    = 0x55;


    //7.Change the CPU Clock Divider setting for the operation with the PLL. It's critical to do
    //this before connecting the PLL.
    CCLKCFG            = 0x00000003;


    
    //8.Wait for the PLL to achieve lock by monitoring the PLOCK bit in the PLLSTAT register

    while (!(PLLSTAT & 0x04000000))         //Wait for it to settle
    { }

    //9.Connect the PLL with one feed sequence.
    PLLCON |= 0x02;                            
    PLLFEED    = 0xAA;          //Write the feed sequence
    PLLFEED    = 0x55;

/*************************************************************************
* Function Name: InitClock
* Parameters: void
* Return: void
*
* Description: Initialize PLL and clocks' dividers. Hclk - 288MHz,
* Usbclk - 48MHz
*
*************************************************************************/
void InitClock(void)
{
// 1. Init OSC
SCS_bit.OSCRANGE = 0;
SCS_bit.OSCEN = 1;
// 2. Wait for OSC ready
while(!SCS_bit.OSCSTAT);
// 3. Disconnect PLL
PLLCON_bit.PLLC = 0;
PLLFEED = 0xAA;
PLLFEED = 0x55;
// 4. Disable PLL
PLLCON_bit.PLLE = 0;
PLLFEED = 0xAA;
PLLFEED = 0x55;
// 5. Select source clock for PLL
CLKSRCSEL_bit.CLKSRC = 1; // Selects the main oscillator as a PLL clock source.
// 6. Set PLL settings 288 MHz
PLLCFG_bit.MSEL = 24-1;
PLLCFG_bit.NSEL = 2-1;
PLLFEED = 0xAA;
PLLFEED = 0x55;
// 7. Enable PLL
PLLCON_bit.PLLE = 1;
PLLFEED = 0xAA;
PLLFEED = 0x55;
// 8. Wait for the PLL to achieve lock
while(!PLLSTAT_bit.PLOCK);
// 9. Set clk divider settings
CCLKCFG = 4-1; // 1/6 Fpll - 72 MHz
USBCLKCFG = 6-1; // 1/6 Fpll - 48 MHz
PCLKSEL0 = PCLKSEL1 = 0; // other peripherals
// 10. Connect the PLL
PLLCON_bit.PLLC = 1;
PLLFEED = 0xAA;
PLLFEED = 0x55;
}

if ( PLLSTAT & (1 << 25) ) // PLLC
{
PLLCON = 1; /* Enable PLL (PLLE=1), disconnected */
PLLFEED = 0xAA;
PLLFEED = 0x55;
}

PLLCON = 0; /* Disable PLL (PLLE=0, PLLC=0), disconnected */
PLLFEED = 0xAA;
PLLFEED = 0x55;

SCS |= 0x20; /* Enable main OSC (OSCEN) */
while( !(SCS & 0x40) ); /* Wait until main OSC is usable (OSCSTAT) */

CLKSRCSEL = 0x1; /* select main OSC, 12MHz, as the PLL clock source */

PLLCFG_bit.MSEL = PLL_MValue;
PLLCFG_bit.NSEL = PLL_NValue;
PLLFEED = 0xAA;
PLLFEED = 0x55;

PLLCON = 1; /* Enable PLL (PLLE=1), disconnected */
PLLFEED = 0xAA;
PLLFEED = 0x55;

CCLKCFG = 4-1; // 1/4 Fpll - 72 MHz
USBCLKCFG = 6-1; // 1/6 Fpll - 48 MHz
PCLKSEL0 = PCLKSEL1 = 0; // other peripherals

while ( ((PLLSTAT & (1 << 26)) == 0) ); /* Check lock bit status (PLOCK==0)*/
while ( (PLLSTAT_bit.MSEL != PLL_MValue) && ( PLLSTAT_bit.NSEL != PLL_NValue) );

PLLCON = 3; /* enable and connect (PLLE=1, PLLC=1)*/
PLLFEED = 0xAA;
PLLFEED = 0x55;
while ( ((PLLSTAT & (1 << 25)) == 0) ); /* Check connect bit status */