PORT fpga_0_RS232_RX_pin = fpga_0_RS232_Uart_RX, DIR = I
PORT fpga_0_RS232_TX_pin = fpga_0_RS232_Uart_TX, DIR = O
PORT sys_clk_pin = dcm_clk_s, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000
PORT EMAC_GMII_TXD_0_pin = EMAC_GMII_TXD_0, DIR = O, VEC = [7:0]
PORT EMAC_GMII_TX_EN_0_pin = EMAC_GMII_TX_EN_0, DIR = O
PORT EMAC_GMII_TX_ER_0_pin = EMAC_GMII_TX_ER_0, DIR = O
PORT EMAC_GMII_TX_CLK_0_pin = EMAC_GMII_TX_CLK_0, DIR = O
PORT EMAC_GMII_RXD_0_pin = EMAC_GMII_RXD_0, DIR = I, VEC = [7:0]
PORT EMAC_GMII_RX_DV_0_pin = EMAC_GMII_RX_DV_0, DIR = I
PORT EMAC_GMII_RX_ER_0_pin = EMAC_GMII_RX_ER_0, DIR = I
PORT EMAC_GMII_RX_CLK_0_pin = EMAC_GMII_RX_CLK_0, DIR = I
PORT EMAC_GMII_MII_TX_CLK_0_pin = EMAC_GMII_MII_TX_CLK_0, DIR = I
PORT EMAC_GMII_TemacPhy_RST_n_pin = EMAC_GMII_TemacPhy_RST_n, DIR = O
PORT EMAC_GMII_MDIO_0_pin = EMAC_GMII_MDIO_0, DIR = IO
PORT EMAC_GMII_MDC_0_pin = EMAC_GMII_MDC_0, DIR = O
PORT EMAC_GMII_RX_COL_pin = EMAC_GMII_RX_COL, DIR = I
PORT EMAC_GMII_RX_CRC_pin = EMAC_GMII_RX_CRC, DIR = I
PORT EMAC_Phy_COMA_0_pin = net_gnd, DIR = O
PORT EMAC_Phy_INT_pin = PHY_INT, DIR = I
PORT RXPPADA_105 = ch2_rxp, DIR = I
PORT RXNPADA_105 = ch2_rxn, DIR = I
PORT TXPPADA_105 = ch2_txp, DIR = O
PORT TXNPADA_105 = ch2_txn, DIR = O
PORT MGTCLK_P_105 = rocket_clk_p, DIR = I
PORT MGTCLK_N_105 = rocket_clk_n, DIR = I

BEGIN ppc405_virtex4
PARAMETER INSTANCE = ppc405_0
PARAMETER HW_VER = 2.01.a
PARAMETER C_FASTEST_PLB_CLOCK = DPLB0
PARAMETER C_IDCR_BASEADDR = 0b0100000000
PARAMETER C_IDCR_HIGHADDR = 0b0111111111
BUS_INTERFACE JTAGPPC = jtagppc_0_0
BUS_INTERFACE IPLB0 = plb
BUS_INTERFACE DPLB0 = plb
BUS_INTERFACE RESETPPC = ppc_reset_bus
PORT CPMC405CLOCK = proc_clk_s
PORT EICC405EXTINPUTIRQ = EICC405EXTINPUTIRQ
END

BEGIN jtagppc_cntlr
PARAMETER INSTANCE = jtagppc_0
PARAMETER HW_VER = 2.01.a
BUS_INTERFACE JTAGPPC0 = jtagppc_0_0
END

BEGIN plb_v46
PARAMETER INSTANCE = plb
PARAMETER C_DCR_INTFCE = 0
PARAMETER C_NUM_CLK_PLB2OPB_REARB = 100
PARAMETER HW_VER = 1.02.a
PORT PLB_Clk = sys_clk_s
PORT SYS_Rst = sys_bus_reset
END

BEGIN xps_bram_if_cntlr
PARAMETER INSTANCE = xps_bram_if_cntlr_1
PARAMETER HW_VER = 1.00.a
PARAMETER C_SPLB_NATIVE_DWIDTH = 64
PARAMETER C_BASEADDR = 0xffffe000
PARAMETER C_HIGHADDR = 0xffffffff
BUS_INTERFACE SPLB = plb
BUS_INTERFACE PORTA = xps_bram_if_cntlr_1_port
END

BEGIN bram_block
PARAMETER INSTANCE = plb_bram_if_cntlr_1_bram
PARAMETER HW_VER = 1.00.a
BUS_INTERFACE PORTA = xps_bram_if_cntlr_1_port
END

BEGIN xps_uartlite
PARAMETER INSTANCE = RS232
PARAMETER HW_VER = 1.00.a
PARAMETER C_BAUDRATE = 115200
PARAMETER C_DATA_BITS = 8
PARAMETER C_ODD_PARITY = 0
PARAMETER C_USE_PARITY = 0
PARAMETER C_SPLB_CLK_FREQ_HZ = 100000000
PARAMETER C_BASEADDR = 0x84000000
PARAMETER C_HIGHADDR = 0x8400ffff
BUS_INTERFACE SPLB = plb
PORT RX = fpga_0_RS232_Uart_RX
PORT TX = fpga_0_RS232_Uart_TX
END

BEGIN clock_generator
PARAMETER INSTANCE = clock_generator_0
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 1
PARAMETER C_CLKIN_FREQ = 100000000
PARAMETER C_CLKOUT0_FREQ = 200000000
PARAMETER C_CLKOUT0_BUF = TRUE
PARAMETER C_CLKOUT0_PHASE = 0
PARAMETER C_CLKOUT0_GROUP = NONE
PARAMETER C_CLKOUT1_FREQ = 100000000
PARAMETER C_CLKOUT1_BUF = TRUE
PARAMETER C_CLKOUT1_PHASE = 0
PARAMETER C_CLKOUT1_GROUP = NONE
PARAMETER C_CLKOUT2_FREQ = 125000000
PARAMETER C_CLKOUT2_BUF = TRUE
PARAMETER C_CLKOUT2_PHASE = 0
PARAMETER C_CLKOUT2_GROUP = NONE
PARAMETER C_CLKOUT3_FREQ = 50000000
PARAMETER C_CLKOUT3_BUF = FALSE
PARAMETER C_CLKOUT3_PHASE = 0
PARAMETER C_CLKOUT3_GROUP = NONE
PORT CLKOUT0 = proc_clk_s
PORT CLKOUT1 = sys_clk_s
PORT CLKOUT2 = emac_clk_s
PORT CLKOUT3 = dclk_50
PORT CLKIN = dcm_clk_s
PORT LOCKED = Dcm_all_locked
PORT RST = net_gnd
END

BEGIN proc_sys_reset
PARAMETER INSTANCE = proc_sys_reset_0
PARAMETER HW_VER = 2.00.a
PARAMETER C_EXT_RESET_HIGH = 1
BUS_INTERFACE RESETPPC0 = ppc_reset_bus
PORT Slowest_sync_clk = sys_clk_s
PORT Dcm_locked = Dcm_all_locked
PORT Ext_Reset_In = net_gnd
PORT Bus_Struct_Reset = sys_bus_reset
PORT Peripheral_Reset = sys_periph_reset
END

BEGIN xps_intc
PARAMETER INSTANCE = xps_intc_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0x81800000
PARAMETER C_HIGHADDR = 0x8180ffff
BUS_INTERFACE SPLB = plb
PORT Irq = EICC405EXTINPUTIRQ
PORT Intr = PHY_INT
END

BEGIN conductor
PARAMETER INSTANCE = conductor_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_NUM_IDELAYCTRL = 4
PARAMETER C_BASEADDR = 0xffffd000
PARAMETER C_HIGHADDR = 0xffffdfff
BUS_INTERFACE SPLB = plb
PORT GTX_CLK_0 = emac_clk_s
PORT GMII_TXD_0 = EMAC_GMII_TXD_0
PORT GMII_TX_EN_0 = EMAC_GMII_TX_EN_0
PORT GMII_TX_ER_0 = EMAC_GMII_TX_ER_0
PORT GMII_TX_CLK_0 = EMAC_GMII_TX_CLK_0
PORT GMII_RXD_0 = EMAC_GMII_RXD_0
PORT GMII_RX_DV_0 = EMAC_GMII_RX_DV_0
PORT GMII_RX_ER_0 = EMAC_GMII_RX_ER_0
PORT GMII_RX_CLK_0 = EMAC_GMII_RX_CLK_0
PORT MII_TX_CLK_0 = EMAC_GMII_MII_TX_CLK_0
PORT REFCLK = proc_clk_s
PORT TemacPhy_RST_n = EMAC_GMII_TemacPhy_RST_n
PORT MDIO_0 = EMAC_GMII_MDIO_0
PORT MDC_0 = EMAC_GMII_MDC_0
PORT GMII_RX_COL = EMAC_GMII_RX_COL
PORT GMII_RX_CRC = EMAC_GMII_RX_CRC
PORT WR_FIFO_CLK = ROCKET_WFF_CLK
PORT WR_FIFO_DATA = ROCKET_WFF_DATA
PORT WR_FIFO_REQ = ROCKET_WFF_WR_REQ
PORT WR_FIFO_FULL = ROCKET_WFF_FULL
PORT WR_FIFO_ALMOST_FULL = ROCKET_WFF_ALMOST_FULL
PORT TX_DATA = R_TO_C_DATA
PORT TX_CLK = R_TO_C_WR_CLK
PORT TX_WR_REQ = R_TO_C_WR_REQ
PORT WFF_FULL = C_TO_R_WFF_FULL
PORT WFF_ALMOST_FULL = C_TO_R_WFF_ALMOST_FULL
END

BEGIN rocket
PARAMETER INSTANCE = rocket_0
PARAMETER HW_VER = 1.00.a
PARAMETER C_BASEADDR = 0xffff9000
PARAMETER C_HIGHADDR = 0xffff9fff
BUS_INTERFACE SPLB = plb
PORT CH_RXP = ch2_rxp
PORT CH_RXN = ch2_rxn
PORT CH_TXP = ch2_txp
PORT CH_TXN = ch2_txn
PORT clkP = rocket_clk_p
PORT clkN = rocket_clk_n
PORT dclk = dclk_50
PORT WFF_WR_CLK = ROCKET_WFF_CLK
PORT WFF_DATA = ROCKET_WFF_DATA
PORT WFF_WR_REQ = ROCKET_WFF_WR_REQ
PORT RFF_DATA = R_TO_C_DATA
PORT RFF_WR_REQ = R_TO_C_WR_REQ
PORT RFF_WR_CLK = R_TO_C_WR_CLK
PORT WFF_FULL = ROCKET_WFF_FULL
PORT WFF_ALMOST_FULL = ROCKET_WFF_ALMOST_FULL
PORT RFF_FULL = C_TO_R_WFF_FULL
PORT RFF_ALMOST_FULL = C_TO_R_WFF_ALMOST_FULL
END