....
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
....

#define SPI1_DR_Address    (SPI1_BASE+0x0C)
unsigned char DFSPI1_DMARecceiveBlock (unsigned char * buff, unsigned long count)
{
    DMA_InitTypeDef dma_spi1_rx = {
        (uint32_t)SPI1_DR_Address,
        (uint32_t)buff,
        DMA_DIR_PeripheralSRC,
        count,
        DMA_PeripheralInc_Disable,
        DMA_MemoryInc_Enable,
        DMA_PeripheralDataSize_Byte,
        DMA_MemoryDataSize_Byte,
        DMA_Mode_Normal,
        DMA_Priority_VeryHigh, //DMA_Priority_Low,
        DMA_M2M_Disable
    };
    DMA_Init(DMA1_Channel2, &dma_spi1_rx);
    
    DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, ENABLE);            // Enable Interrupt on transmition compleet

    SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE);        // Enable Rx DMA

    DMA_Cmd(DMA1_Channel2, ENABLE);                            // Start Rx DMA

    while(!DMA_GetFlagStatus(DMA1_FLAG_TC2));                // Wait while recceive compleet
    
    DMA_Cmd(DMA1_Channel2, DISABLE);
    return 1;
}