library IEEE;
use IEEE.Std_Logic_1164.all;
use IEEE.Std_Logic_unsigned.all;

entity qwe is generic (
    constant cnRAM_W:    positive := 11
); port (
    WR_A:    in    std_logic_vector(cnRAM_W-1 downto 0);
--    WR_D:    in    std_logic_vector(31 downto 0);
--    WR_D:    in    std_logic_vector(63 downto 0);
    WR_D:    in    std_logic_vector(127 downto 0);
    WR_C:    in    std_logic;
    RD_A:    in    std_logic_vector(cnRAM_W-1 downto 0);
--    RD_D:    out    std_logic_vector(31 downto 0);
--    RD_D:    out    std_logic_vector(63 downto 0);
    RD_D:    out    std_logic_vector(127 downto 0);
    RD_C:    in    std_logic
);
end entity;

architecture Tushka of qwe is
    constant cnRAM_D:    positive := 2**cnRAM_W;
    
--    alias    RAMB_WR_D:    std_logic_vector(26 downto  0) is WR_D(26 downto  0);
--    alias    RAMD_WR_D:    std_logic_vector(31 downto 27) is WR_D(31 downto 27);

--    alias    RAMB_WR_D:    std_logic_vector(62 downto  0) is WR_D(62 downto  0);
--    alias    RAMD_WR_D:    std_logic_vector(63 downto 63) is WR_D(63 downto 63);
    
    alias    RAMB_WR_D:    std_logic_vector(125 downto   0) is WR_D(125 downto   0);
    alias    RAMD_WR_D:    std_logic_vector(127 downto 126) is WR_D(127 downto 126);
    
    alias    RAMB_RD_D:    std_logic_vector(RAMB_WR_D'Range) is RD_D(RAMB_WR_D'Range);
    alias    RAMD_RD_D:    std_logic_vector(RAMD_WR_D'Range) is RD_D(RAMD_WR_D'Range);
    
    type    taRAMB is array (0 to cnRAM_D-1) of std_logic_vector(RAMB_WR_D'Range);
    type    taRAMD is array (0 to cnRAM_D-1) of std_logic_vector(RAMD_WR_D'Range);
    
    signal    aRAMB:    taRAMB;
    signal    aRAMD:    taRAMD;
    
    attribute RAM_Style:  string;
    attribute RAM_Style of aRAMD: signal is "distributed";
begin
    process(WR_C) begin
        if rising_edge(WR_C) then
            aRAMB(conv_integer(WR_A)) <= RAMB_WR_D;
            aRAMD(conv_integer(WR_A)) <= RAMD_WR_D;
        end if;
    end process;
    
    process(RD_C) begin
        if rising_edge(RD_C) then
            RAMB_RD_D <= aRAMB(conv_integer(RD_A));
            RAMD_RD_D <= aRAMD(conv_integer(RD_A));
        end if;
    end process;
    
end architecture;