void InitUart(void)
{
    //отключаем пины USART0
    AT91C_BASE_PIOA->PIO_PDR = PA1 | PA0;


    AT91C_BASE_SYS->AIC_SVR[AT91C_ID_US0] = (INT32U) UartIrqHandler;
    //растановка приоритета прерывания
    AT91C_BASE_SYS->AIC_SMR[AT91C_ID_US0] = 0x63; // SRCTYPE=1, PRIOR=3. USART 0 interrupt positive edge-triggered at prio 3 //0x02;
    //разрешение прерывания по Timer 1
    AT91C_BASE_SYS->AIC_IECR = (1<<AT91C_ID_US0);
    AT91C_BASE_SYS->AIC_ICCR = (1<<AT91C_ID_US0);


    *AT91C_US0_BRGR = 625;
    *AT91C_US0_MR = 0x000808C0; // Normal mode, 1 stop bit, no parity, async mode, 8 bits, MCK.
    *AT91C_US0_IDR = 0xffffffff; // Disable all USART interrupts
    *AT91C_US0_IER = AT91C_US_RXRDY;

    *AT91C_US0_CR = AT91C_US_RXDIS | AT91C_US_TXDIS;
    *AT91C_US0_CR = 0x0000010c; // Reset status bits, reset rx/tx.
    *AT91C_US0_CR = AT91C_US_RXEN | AT91C_US_TXEN;
    *AT91C_PMC_PCER = (1 << AT91C_ID_US0);
}

void UartIrqHandler(void)
{
    INT8U Tmp = *AT91C_US0_CSR;
    INT8U Data;

    //AT91C_BASE_AIC->AIC_IVR = 0;
    //AT91C_BASE_AIC->AIC_ICCR  = (1 << AT91C_ID_US0);

    Data = *AT91C_US0_RHR;

    do
    {
        Tmp = *AT91C_US0_CSR;
    } while ((Tmp & 0x02) == 0);

    *AT91C_US0_THR = Data;

    Main.Led1Blink = 1;
    
    AT91C_BASE_AIC->AIC_EOICR = 0;            // Signal end of interrupt
}

AT91C_BASE_SYS->AIC_SMR[AT91C_ID_US0] = 0x63

__irq __arm void UartIrqHandler(void)

IRQ_Handler_Entry:
//           ldr          pc, AT91C_AIC_IVR
;-------------------------
;- Manage Exception Entry
;-------------------------
;- Adjust and save LR_irq in IRQ stack
    sub         lr, lr, #4
    stmfd       sp!, {lr}

;- Save r0 and SPSR (need to be saved for nested interrupt)
    mrs         r14, SPSR
    stmfd       sp!, {r0,r14}

;- Write in the IVR to support Protect Mode
;- No effect in Normal Mode
;- De-assert the NIRQ and clear the source in Protect Mode
    ldr         r14, =AT91C_BASE_AIC
    ldr         r0 , [r14, #+AIC_IVR]
    str         r14, [r14, #+AIC_IVR]

;- Enable Interrupt and Switch in Supervisor Mode
    msr         CPSR_c, #ARM_MODE_SVC

;- Save scratch/used registers and LR in User Stack
    stmfd       sp!, { r1-r3, r12, r14}

;----------------------------------------------
;- Branch to the routine pointed by the AIC_IVR
;----------------------------------------------
    mov         r14, pc
    bx          r0

;----------------------------------------------
;- Manage Exception Exit
;----------------------------------------------
;- Restore scratch/used registers and LR from User Stack
    ldmia       sp!, { r1-r3, r12, r14}

;- Disable Interrupt and switch back in IRQ mode
    msr         CPSR_c, #I_BIT | ARM_MODE_IRQ

;- Mark the End of Interrupt on the AIC
    ldr         r14, =AT91C_BASE_AIC
    str         r14, [r14, #AIC_EOICR]

;- Restore SPSR_irq and r0 from IRQ stack
    ldmia       sp!, {r0,r14}
    msr         SPSR_cxsf, r14

;- Restore adjusted  LR_irq from IRQ stack directly in the PC
    ldmia       sp!, {pc}^

    INT8U Tmp = *AT91C_US0_CSR;

    do
    {
        Tmp = *AT91C_US0_CSR;
    } while ((Tmp & 0x02) == 0);

    while((*AT91C_US0_CSR & 0x02) == 0);