module  CountCarry
#(parameter    WIDTH = 24)
  (
  input        rst,
  input        clk,
  input        clk_en,
  input        cnt_en,
  input        load,
  input        [WIDTH-1:0] data,
  output    [WIDTH-1:0] cnt,
  output    cout, cout2
  );
  
  wire [WIDTH:0] cnt_reg;
  wire [WIDTH:0] cnt_next;
  wire [WIDTH:0] cnt_carry;
  wire [WIDTH:0] cnt_init = {1'b0, data};

  genvar i;
  generate
    for (i=0; i<=WIDTH; i++) begin : dff_gen

      carry  carry
      (
        .in    ((i ? cnt_carry[i-1] : cnt_en) & cnt_reg[i]),
        .out    (cnt_carry[i])
      );

      dffeas  dffeas
      (
        .clk    (clk),
        .d    ((i ? cnt_carry[i-1] : cnt_en) ^ cnt_reg[i]),
        .ena    (clk_en),
        .asdata    (cnt_init[i]),
        .clrn    (rst),
        .sload    (load),
        .q    (cnt_reg[i])
      );
    end
  endgenerate

  assign cnt = cnt_reg[WIDTH-1:0];
  assign cout = cnt_reg[WIDTH];
  assign cout2 = cnt_next[WIDTH];

endmodule

module  CountPrim
#(
  parameter    WIDTH = 8,        // number of bits
  parameter    DIRECT = "UP"        // count direction: "UP" or "DOWN"
  )
  (
  input        rst_n,        // async reset
  input        clk_en,        // clock enable all flip-flops
  input        clk,
  input        cnt_en,        // count enable
  input        load,        // hi-level sync load
  input        [WIDTH-1:0] data,    // data for sync load
  output bit    [WIDTH-1:0] cnt,    // bits of counter
  output bit    rcry,            // ripple carry
  output bit    tcry            // triggered (sync) carry
  );
  
  wire [WIDTH:-1] cnt_cry;

  carry  cryin (
    .in        (cnt_en),
    .out    (cnt_cry[-1]) );

  genvar i;
  generate
    for (i=0; i<WIDTH; i++) begin : bitgen
      if (DIRECT == "DOWN")
        carry  crycnt (
          .in    (cnt_cry[i-1] & !cnt[i]),
          .out    (cnt_cry[i]) );
      else                // "UP"
        carry  crycnt (
          .in    (cnt_cry[i-1] & cnt[i]),
          .out    (cnt_cry[i]) );
      
      dffeas  dffcnt (
        .clk    (clk),
        .d    (cnt_cry[i-1] ^ cnt[i]),
        .ena    (clk_en),
        .asdata    (data[i]),
        .clrn    (rst_n),
        .sload    (load),
        .q    (cnt[i]) );
    end
  endgenerate

  assign rcry = cnt_cry[WIDTH-1];
  dffeas  dffcry (
    .clk    (clk),
    .d    (rcry),
    .ena    (clk_en),
    .clrn    (rst_n),
    .q    (tcry) );
endmodule