void InitMMU(unsigned int *pTranslationTable)
{
int i;
// Program the TTB
_writeTTB((unsigned int) pTranslationTable);
// Program the domain access register
_writeDomain(0xC0000000);

// Reset table entries
for (i = 0; i < 4096; ++i)
pTranslationTable[i] = 0;
// Program level 1 page table entry

pTranslationTable[0x3] =
(0x3 << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
(1 << 3) | // Cachable
0x2; // Set as 1 Mbyte section

/* SDRAM entire mapping */
for(i=0;i<64;i++)
pTranslationTable[0x200+i] =
((0x200+i) << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
(1 << 3) | // Cachable
0x2; // Set as 1 Mbyte section

pTranslationTable[0xFFF] =
(0xFFF << 20) | // Physical Address
(1 << 10) | // Access in supervisor mode
(15 << 5) | // Domain
(1 << 4) |
0x2; // Set as 1 Mbyte section

// Enable the MMU
CP15_EnableMMU();
}

int main(void)
{
CP15_Enable_I_Cache();
InitMMU((unsigned int *) 0x310000);