Еще одно синтезируемое RISC-ядро под Altera, Отличается особой компактностью. Опции

[Stewart Little]

The Total CPU (TCPU)

"It is easily realizable and easily modified RISC processor mainly aimed for implementation in FPGAs. The key feature of this CPU is that its command set does not dependent upon data word width, and, therefore, minimal modifications are required for code reuse. The CPU is completely realized on Verilog-2001 and easily expanded to include additional modules and commands. TCPU doesn’t require a lot of FPGA resources. For example, minimal 12-bit realization on Cyclone FPGA (Altera) requires 167 LCs, 32-bit realization – 314 LCs."