ЗЫ На alterawiki нашел вот такое
Код
Clock sources
Issue: Clocks generated in a subsystem can't be both exported and internally connected. Master interfaces associated with such clocks will cause problems when hierarchical systems are assembled. Exporting then re-importing these clocks will infer unnecessary clock-domain-crossing logic and latency.
Workaround: Anything that generates a global clock, e.g. an SDRAM controller or a PLL, should be instantiated in your top level system. Alternatively, consider using a clock bridge and exporting one side of the bridge.
Issue: Clocks generated in a subsystem can't be both exported and internally connected. Master interfaces associated with such clocks will cause problems when hierarchical systems are assembled. Exporting then re-importing these clocks will infer unnecessary clock-domain-crossing logic and latency.
Workaround: Anything that generates a global clock, e.g. an SDRAM controller or a PLL, should be instantiated in your top level system. Alternatively, consider using a clock bridge and exporting one side of the bridge.
Но для какой версии это актуально неизвестно...