void GPIO(void)
{
GPIO_InitTypeDef gpio;

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB|RCC_AHB1Periph_GPIOD|RCC_AHB1Periph_
GPIOE,ENABLE);

//LCD
GPIO_PinAFConfig(GPIOD,GPIO_PinSource14,GPIO_AF_FSMC); // D0
GPIO_PinAFConfig(GPIOD,GPIO_PinSource15,GPIO_AF_FSMC); // D1
GPIO_PinAFConfig(GPIOD,GPIO_PinSource0 ,GPIO_AF_FSMC); // D2
GPIO_PinAFConfig(GPIOD,GPIO_PinSource1 ,GPIO_AF_FSMC); // D3
GPIO_PinAFConfig(GPIOE,GPIO_PinSource7 ,GPIO_AF_FSMC); // D4
GPIO_PinAFConfig(GPIOE,GPIO_PinSource8 ,GPIO_AF_FSMC); // D5
GPIO_PinAFConfig(GPIOE,GPIO_PinSource9 ,GPIO_AF_FSMC); // D6
GPIO_PinAFConfig(GPIOE,GPIO_PinSource10,GPIO_AF_FSMC); // D7
GPIO_PinAFConfig(GPIOD,GPIO_PinSource11,GPIO_AF_FSMC); //A16 => RS
GPIO_PinAFConfig(GPIOD,GPIO_PinSource7 ,GPIO_AF_FSMC); //NE1 => CS !!! ВОСПРИИМЧИВ К ПОМЕХАМ !!! РЕЗИСТОР ИЛИ ПОНИЗИТЬ ЧАСТОТУ GPIO D7
GPIO_PinAFConfig(GPIOD,GPIO_PinSource4 ,GPIO_AF_FSMC); //NOE => RD
GPIO_PinAFConfig(GPIOD,GPIO_PinSource5 ,GPIO_AF_FSMC); //NWE => WR

gpio.GPIO_Pin=GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_7|GPIO_Pin_11
|GPIO_Pin_14|GPIO_Pin_15;
gpio.GPIO_Mode=GPIO_Mode_AF;
gpio.GPIO_Speed=GPIO_Speed_100MHz;
gpio.GPIO_OType=GPIO_OType_PP;
gpio.GPIO_PuPd=GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD,&gpio);

gpio.GPIO_Pin=GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10;
gpio.GPIO_Mode=GPIO_Mode_AF;
gpio.GPIO_Speed=GPIO_Speed_100MHz;
gpio.GPIO_OType=GPIO_OType_PP;
gpio.GPIO_PuPd=GPIO_PuPd_NOPULL;
GPIO_Init(GPIOE,&gpio);

//LCD !RST B11
gpio.GPIO_Pin=GPIO_Pin_11;
gpio.GPIO_Mode=GPIO_Mode_OUT;
gpio.GPIO_Speed=GPIO_Speed_2MHz;
gpio.GPIO_OType=GPIO_OType_PP;
gpio.GPIO_PuPd=GPIO_PuPd_NOPULL;
GPIO_Init(GPIOB,&gpio);

//LCD WSYNC B3
gpio.GPIO_Pin=GPIO_Pin_3;
gpio.GPIO_Mode=GPIO_Mode_IN;
gpio.GPIO_Speed=GPIO_Speed_2MHz;
gpio.GPIO_OType=GPIO_OType_PP;
gpio.GPIO_PuPd=GPIO_PuPd_NOPULL;
GPIO_Init(GPIOB,&gpio);

//LED TEST D12
gpio.GPIO_Pin=GPIO_Pin_12;
gpio.GPIO_Mode=GPIO_Mode_OUT;
gpio.GPIO_Speed=GPIO_Speed_2MHz;
gpio.GPIO_OType=GPIO_OType_PP;
gpio.GPIO_PuPd=GPIO_PuPd_NOPULL;
GPIO_Init(GPIOD,&gpio);
}

void FSMC(void) //!!! HCLK=168 MHz
{
FSMC_NORSRAMTimingInitTypeDef fsmcTimingRead,fsmcTimingWrite;
FSMC_NORSRAMInitTypeDef fsmc;

RCC_AHB3PeriphClockCmd(RCC_AHB3Periph_FSMC,ENABLE);

fsmcTimingRead.FSMC_AddressSetupTime=1; //!!!
fsmcTimingRead.FSMC_AddressHoldTime=0;

fsmcTimingRead.FSMC_DataSetupTime=13; //RD

fsmcTimingRead.FSMC_BusTurnAroundDuration=0;
fsmcTimingRead.FSMC_CLKDivision=0;
fsmcTimingRead.FSMC_DataLatency=0;
fsmcTimingRead.FSMC_AccessMode=FSMC_AccessMode_A;

memcpy(&fsmcTimingWrite,&fsmcTimingRead,sizeof(fsmcTimingRead));

fsmcTimingWrite.FSMC_DataSetupTime=2; //WR

fsmc.FSMC_Bank=FSMC_Bank1_NORSRAM1;
fsmc.FSMC_DataAddressMux=FSMC_DataAddressMux_Disable;
fsmc.FSMC_MemoryType=FSMC_MemoryType_SRAM;
fsmc.FSMC_MemoryDataWidth=FSMC_MemoryDataWidth_8b;
fsmc.FSMC_BurstAccessMode=FSMC_BurstAccessMode_Disable;
fsmc.FSMC_WaitSignalPolarity=FSMC_WaitSignalPolarity_Low;
fsmc.FSMC_WrapMode=FSMC_WrapMode_Disable;
fsmc.FSMC_WaitSignalActive=FSMC_WaitSignalActive_BeforeWaitState;
fsmc.FSMC_WriteOperation=FSMC_WriteOperation_Enable;
fsmc.FSMC_WaitSignal=FSMC_WaitSignal_Disable;
fsmc.FSMC_AsynchronousWait=FSMC_AsynchronousWait_Disable;
fsmc.FSMC_ExtendedMode=FSMC_ExtendedMode_Enable; //For Different Read & Write Timings !!!
fsmc.FSMC_WriteBurst=FSMC_WriteBurst_Disable;

fsmc.FSMC_ReadWriteTimingStruct=&fsmcTimingRead;
fsmc.FSMC_WriteTimingStruct=&fsmcTimingWrite;

FSMC_NORSRAMInit(&fsmc);
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1,ENABLE);
}

#define LCD_COM16 (*(volatile unsigned short int*) 0x60000000)
#define LCD_DAT16 (*(volatile unsigned short int*) 0x60010000)

void LCD_Transfer(void)
{
register u32 i=(320*240)>>1;
register u32 *v=(u32*)VideoBuffer;
while(i--)LCD_DAT32=rev16(*v++);
}

void LCD_Transfer(void)
{
register u32 i=(320*240);
register u16 *v=(u16*)VideoBuffer;
while(i--)LCD_DAT16=rev16(*v++);
}

void LCD_Transfer(void)
{
register u32 i=(320*240)<<1;
register u8 *v=(u8*)VideoBuffer;
while(i--)LCD_DAT8=*v++;
}

__no_init volatile uint16_t cpld_regs[16] @0x60000000;

extern "C" void EXTI0_IRQHandler()
{
cpld_regs[0] = ppm8s.state.rx.chanel[0].fv_att_h.fvatt;
cpld_regs[1] = ppm8s.state.rx.chanel[0].fv_att_v.fvatt;
cpld_regs[2] = ppm8s.state.rx.chanel[1].fv_att_h.fvatt;;
cpld_regs[3] = ppm8s.state.rx.chanel[1].fv_att_v.fvatt;
cpld_regs[4] = ppm8s.state.rx.chanel[2].fv_att_h.fvatt;;
cpld_regs[5] = ppm8s.state.rx.chanel[2].fv_att_v.fvatt;
cpld_regs[6] = ppm8s.state.rx.chanel[3].fv_att_h.fvatt;;
cpld_regs[7] = ppm8s.state.rx.chanel[3].fv_att_v.fvatt;
cpld_regs[8] = (uint16_t)ppm8s.state.rx.dt_hp;
cpld_regs[9] = (uint16_t)ppm8s.state.rx.dt_vp;
GPIOE->BSRR = (1<<4); //LE_RF_OFF=1
EXTI->PR = EXTI_PR_PR0;
GPIOE->BSRR = (1<<16+4); //LE_RF_OFF=0
}

  //Инициализация FMC для доступа к регистрам CPLD
  FMC_Bank1->BCR1 = 0x1091;
  FMC_Bank1->BTR1 = 0x0FFF01F2;

FMC_BCR1_MBKEN = 1
FMC_BCR1_MUXEN = 0
FMC_BCR1_MTYP = 00 [SRAM]
FMC_BCR1_MWID = 01 [16 бит]
FMC_BCR1_FACCEN = 0
FMC_BCR1_BURSTEN = 0
FMC_BCR1_WAITPOL = 0
FMC_BCR1_WRAPMOD = 0
FMC_BCR1_WAITCFG = 0
FMC_BCR1_WREN = 1
FMC_BCR1_WAITEN = 0
FMC_BCR1_EXTMOD = 0
FMC_BCR1_ASYNCWAIT = 0
FMC_BCR1_CPSIZE = 000
FMC_BCR1_CBURSTRW = 0
FMC_BCR1_CCLKEN =0

FMC_BTR1_ADDSET = 2
FMC_BTR1_ADDHLD = F
FMC_BTR1_DATAST = 1
FMC_BTR1_BUSTURN = F
FMC_BTR1_CLKDIV = F
FMC_BTR1_DATLAT = F
FMC_BTR1_ACCMOD = 0 [A mode]

LDR.W R3,??DataTable6_1 ;; 0x40013c14
LDRH R2,[R1, #+0]
MOV R0,#+1610612736
STRH R2,[R0, #+0]
LDRH R2,[R1, #+2]
STRH R2,[R0, #+2]
LDRH R2,[R1, #+4]
STRH R2,[R0, #+4]
LDRH R2,[R1, #+6]
STRH R2,[R0, #+6]
LDRH R2,[R1, #+8]
STRH R2,[R0, #+8]
LDRH R2,[R1, #+10]
STRH R2,[R0, #+10]
LDRH R2,[R1, #+12]
STRH R2,[R0, #+12]
LDRH R2,[R1, #+14]
STRH R2,[R0, #+14]
LDRB R2,[R1, #+16]
STRH R2,[R0, #+16]
MOVS R2,#+1
LDRB R1,[R1, #+17]
STRH R1,[R0, #+18]
MOVS R1,#+16
LDR.W R0,??DataTable6_2 ;; 0x40020c18
STR R1,[R0, #+1024]
MOV R1,#+1048576
STR R1,[R0, #+1024]
STR R2,[R3, #+0]

  *(uint32_t *)&cpld_regs[0] = *(uint32_t *)&ppm8s.state.rx.chanel[0];
  *(uint32_t *)&cpld_regs[2] = *(uint32_t *)&ppm8s.state.rx.chanel[1];
  *(uint32_t *)&cpld_regs[4] = *(uint32_t *)&ppm8s.state.rx.chanel[2];
  *(uint32_t *)&cpld_regs[6] = *(uint32_t *)&ppm8s.state.rx.chanel[3];
  cpld_regs[8] = (uint16_t)ppm8s.state.rx.dt_hp;     //Эти поля uint8_t
  cpld_regs[9] = (uint16_t)ppm8s.state.rx.dt_vp;

union {
  struct {
    u16 r0, r1, ..., rx;
  } r16;
  struct {
    u32 r0, r1, ..., ry;
  } r32;
};

memcpy128 PROC
                EXPORT memcpy128

      vpush {s16 - s31}                                        ; 17

z     vldm.32 r1!, {s0 - s31}                                  ; 33
      vstm.32 r0!, {s0 - s31}                                  ; 33
      subs.n r2, #1                                            ; 1
      bne.n z                                                  ; ~3 (taken)

      vpop {s16 - s31}                                         ; 17
      bx lr                                                    ; 1-3??

                ENDP

void memcpy128(void *destination,const void *source,int num);