Для начала, как я понимаю, запрос на ДМА воникает при приеме данных. Чтобы что-то принять нужно что-то передать. Настраиваю один канал на прием, второй на передачу. Как запустить передачу? Сигнал SSP TX постоянно активен, пока не заполнено FIFO? Или надо произвести какие-то телодвижения, чтобы запустить передачу?
Пока имею такой код. ДМА не запускается, код ничего никуда не грузит...

Код
DMA_InitTypeDef DMA_InitStruct;
DMA_ChannelCmd(DMA_Channel0, DISABLE); // Disable the DMA channel
DMA_ChannelCmd(DMA_Channel1, DISABLE); // Disable the DMA channel
/* RECIVE */
DMA_StructInit(&DMA_InitStruct);
/* Write the first LLI*/
DMA_InitStruct.DMA_Channel_LLstItm = 0; // Set the addresses of next linked list for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcAdd = (u32)&(SSP0->DR); // source address for the first LLI structure
DMA_InitStruct.DMA_Channel_DesAdd = (u32)pData; // Destination address for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcWidth = DMA_SrcWidth_Byte; // The source bus width is a byte
DMA_InitStruct.DMA_Channel_DesWidth = DMA_SrcWidth_Byte; // The Destination bus width is a byte
DMA_InitStruct.DMA_Channel_FlowCntrl = DMA_FlowCntrl_Perip2;// DMA is The flow controller
DMA_InitStruct.DMA_Channel_TrsfSize = 512; // Transfer size
DMA_InitStruct.DMA_Channel_Src = DMA_SRC_SSP0_RX; // Chanel source
/* Configure the DMA channel1 "the chosen channel to perform the transfer" */
DMA_ChannelSRCIncConfig (DMA_Channel0, DISABLE);
DMA_ChannelDESIncConfig (DMA_Channel0, ENABLE);
DMA_SyncConfig(0, ENABLE);
DMA_Init(DMA_Channel0,&DMA_InitStruct); // update the DMA channel1 registers with the cfirst LLI structure
/* TRANSFER */
DMA_StructInit(&DMA_InitStruct);
/* Write the first LLI*/
DMA_InitStruct.DMA_Channel_LLstItm = 0; // Set the addresses of next linked list for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcAdd = (u32)pData; // source address for the first LLI structure
DMA_InitStruct.DMA_Channel_DesAdd = (u32)&(SSP0->DR); // Destination address for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcWidth = DMA_SrcWidth_Byte; // The source bus width is a byte
DMA_InitStruct.DMA_Channel_DesWidth = DMA_SrcWidth_Byte; // The Destination bus width is a byte
DMA_InitStruct.DMA_Channel_FlowCntrl = DMA_FlowCntrl_Perip1;// DMA is The flow controller
DMA_InitStruct.DMA_Channel_TrsfSize = 512; // Transfer size
DMA_InitStruct.DMA_Channel_Src = DMA_DES_SSP0_TX; // Chanel destination
/* Configure the DMA channel1 "the chosen channel to perform the transfer" */
DMA_ChannelSRCIncConfig(DMA_Channel1, ENABLE);
DMA_ChannelDESIncConfig(DMA_Channel1, DISABLE);
DMA_SyncConfig(1, ENABLE);
DMA_Init(DMA_Channel1,&DMA_InitStruct); // update the DMA channel1 registers with the cfirst LLI structure
DMA_ChannelCmd(DMA_Channel0,ENABLE); // Enable the DMA channel
DMA_ChannelCmd(DMA_Channel1,ENABLE); // Enable the DMA channel
/*wait for the fifo to be empty*/
while(DMA_GetChannelActiveStatus(DMA_Channel1));
DMA_ChannelCmd(DMA_Channel0, DISABLE); // Disable the DMA channel
DMA_ChannelCmd(DMA_Channel1, DISABLE); // Disable the DMA channel
/* RECIVE */
DMA_StructInit(&DMA_InitStruct);
/* Write the first LLI*/
DMA_InitStruct.DMA_Channel_LLstItm = 0; // Set the addresses of next linked list for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcAdd = (u32)&(SSP0->DR); // source address for the first LLI structure
DMA_InitStruct.DMA_Channel_DesAdd = (u32)pData; // Destination address for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcWidth = DMA_SrcWidth_Byte; // The source bus width is a byte
DMA_InitStruct.DMA_Channel_DesWidth = DMA_SrcWidth_Byte; // The Destination bus width is a byte
DMA_InitStruct.DMA_Channel_FlowCntrl = DMA_FlowCntrl_Perip2;// DMA is The flow controller
DMA_InitStruct.DMA_Channel_TrsfSize = 512; // Transfer size
DMA_InitStruct.DMA_Channel_Src = DMA_SRC_SSP0_RX; // Chanel source
/* Configure the DMA channel1 "the chosen channel to perform the transfer" */
DMA_ChannelSRCIncConfig (DMA_Channel0, DISABLE);
DMA_ChannelDESIncConfig (DMA_Channel0, ENABLE);
DMA_SyncConfig(0, ENABLE);
DMA_Init(DMA_Channel0,&DMA_InitStruct); // update the DMA channel1 registers with the cfirst LLI structure
/* TRANSFER */
DMA_StructInit(&DMA_InitStruct);
/* Write the first LLI*/
DMA_InitStruct.DMA_Channel_LLstItm = 0; // Set the addresses of next linked list for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcAdd = (u32)pData; // source address for the first LLI structure
DMA_InitStruct.DMA_Channel_DesAdd = (u32)&(SSP0->DR); // Destination address for the first LLI structure
DMA_InitStruct.DMA_Channel_SrcWidth = DMA_SrcWidth_Byte; // The source bus width is a byte
DMA_InitStruct.DMA_Channel_DesWidth = DMA_SrcWidth_Byte; // The Destination bus width is a byte
DMA_InitStruct.DMA_Channel_FlowCntrl = DMA_FlowCntrl_Perip1;// DMA is The flow controller
DMA_InitStruct.DMA_Channel_TrsfSize = 512; // Transfer size
DMA_InitStruct.DMA_Channel_Src = DMA_DES_SSP0_TX; // Chanel destination
/* Configure the DMA channel1 "the chosen channel to perform the transfer" */
DMA_ChannelSRCIncConfig(DMA_Channel1, ENABLE);
DMA_ChannelDESIncConfig(DMA_Channel1, DISABLE);
DMA_SyncConfig(1, ENABLE);
DMA_Init(DMA_Channel1,&DMA_InitStruct); // update the DMA channel1 registers with the cfirst LLI structure
DMA_ChannelCmd(DMA_Channel0,ENABLE); // Enable the DMA channel
DMA_ChannelCmd(DMA_Channel1,ENABLE); // Enable the DMA channel
/*wait for the fifo to be empty*/
while(DMA_GetChannelActiveStatus(DMA_Channel1));