uint AT91F_UDP_Read(AT91PS_CDC pCdc, char *pData, uint length)
{
AT91PS_UDP pUdp = pCdc->pUdp;
uint packetSize, nbBytesRcv = 0, currentReceiveBank = pCdc->currentRcvBank;
if ((pUdp->UDP_CSR[AT91C_EP_OUT] & AT91C_UDP_RX_DATA_BK0)||(pUdp->UDP_CSR[AT91C_EP_OUT] & AT91C_UDP_RX_DATA_BK1))
{
  return 0;//то есть, если не было ни одного пакета принято, то просто выходим
}
while (length) {
  if ( !AT91F_UDP_IsConfigured(pCdc) )
   break;
  if ( pUdp->UDP_CSR[AT91C_EP_OUT] & currentReceiveBank ) {
   packetSize = MIN(pUdp->UDP_CSR[AT91C_EP_OUT] >> 16, length);
   length -= packetSize;
   if (packetSize < AT91C_EP_OUT_SIZE)
    length = 0;
   while(packetSize--)
    pData[nbBytesRcv++] = pUdp->UDP_FDR[AT91C_EP_OUT];
   pUdp->UDP_CSR[AT91C_EP_OUT] &= ~(currentReceiveBank);
   if (currentReceiveBank == AT91C_UDP_RX_DATA_BK0)
    currentReceiveBank = AT91C_UDP_RX_DATA_BK1;
   else
    currentReceiveBank = AT91C_UDP_RX_DATA_BK0;</P> <P>  }
}
        pUdp->UDP_CSR[AT91C_EP_OUT] &= ~(AT91C_UDP_TXCOMP);
pCdc->currentRcvBank = currentReceiveBank;
return nbBytesRcv;</P> <P>}

uint AT91F_UDP_Write(AT91PS_CDC pCdc, const char *pData, uint length)
{
AT91PS_UDP pUdp = pCdc->pUdp;
uint cpt = 0;</P> <P>        if ((pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXPKTRDY))
{
  return 0;//если усб готово к передаче, то начинаем её
}
pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);
cpt = MIN(length, AT91C_EP_IN_SIZE);
length -= cpt;
while (cpt--) pUdp->UDP_FDR[AT91C_EP_IN] = *pData++;
pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;</P> <P> while (length) {
  cpt = MIN(length, AT91C_EP_IN_SIZE);
  length -= cpt;
  while (cpt--) pUdp->UDP_FDR[AT91C_EP_IN] = *pData++;
  while ( !(pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP) )
   if ( !AT91F_UDP_IsConfigured(pCdc) ) return length;
  pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);
  while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);
  pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;
}
return length;
}

pCDC.Read(&pCDC, ((char *) &data_comp), 2);
if ((length>256))
      {
pCDC.Write(&pCDC, data, length);
}

if ((pUdp->UDP_CSR[AT91C_EP_OUT] & AT91C_UDP_RX_DATA_BK0)||(pUdp->UDP_CSR[AT91C_EP_OUT] & AT91C_UDP_RX_DATA_BK1))
{
  return 0;//то есть, если не было ни одного пакета принято, то просто выходим
}

/*****************************************************************************
Main UDP interrupt handler.
******************************************************************************/
static void ISR_Handler(void)
{    
      UINT32 isr;
    
      /* Read interrupt status register and check events */
      isr = AT91C_BASE_UDP->UDP_ISR;
    
    /* USB bus reset event */
    if(AT91C_UDP_ENDBUSRES & isr)    
    {    
          DBG_OUT("USB bus reset!\r\n");
        
        /* Disable and clear all interruptions, reverting to the base state */
          AT91C_BASE_UDP->UDP_IDR = MAXUINT32;
        AT91C_BASE_UDP->UDP_ICR = MAXUINT32;
          
        /* Reset all endpoints FIFOs */
          AT91C_BASE_UDP->UDP_RSTEP = MAXUINT32;    
        AT91C_BASE_UDP->UDP_RSTEP = 0;
        
        /* Reset EP0 to a basic control endpoint */
        AT91C_UDP_CSR[0] = AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL;
        while (AT91C_UDP_CSR[0] != (AT91C_UDP_EPEDS | AT91C_UDP_EPTYPE_CTRL));
        
        /* Enable interrupt for control enpoint (0) events.
        Other interrupts get enabled as the enumeration process complete */
        AT91C_BASE_UDP->UDP_IER = AT91C_UDP_EPINT0;
        
        /* Enable the function endpoints, setting address 0, and return
         immediately. Given that we've just reset everything, there's no
         point in continuing. */
        AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN;
        AT91C_BASE_UDP->UDP_TXVC = 0;    /* Enable tranceiver */
        USB_State.curr_cfg = 0;    /* Clear current configuration */
    }

    /* Check endpoints events */
    if(AT91C_UDP_EPINT0 & isr)
          EV_EP0Int();
    
    AT91C_BASE_AIC->AIC_ICCR  = 1 << AT91C_ID_UDP;
}

/*******************************************************************************
Control endpoint interrupt event
*******************************************************************************/
static void EV_EP0Int(void)
{    
      UINT32 csr;
        
    csr = AT91C_BASE_UDP->UDP_CSR[0];    /* Get endpoint status and check events */
    
    /* A setup data packet has been sent by the host and is available in the FIFO */
    if(AT91C_UDP_RXSETUP & csr)
        Enumerate();    /* Call USB routine (notify that setup paket received)*/
    
    /* Receive Data from Bank's */
    if(AT91C_UDP_RX_DATA_BK0 & csr)
    {    
          DBG_OUT("ISR EP0 RX0\r\n");    
          UDP_EP_CLR_FLAG(0, AT91C_UDP_RX_DATA_BK0);    /* Notify USB peripheral device that data have been read */    
        USB_State.tx_len[0] = 0;    /* Stop Tx transfer */
    }
    if(AT91C_UDP_RX_DATA_BK1 & csr)
    {    
          DBG_OUT("ISR EP0 RX1\r\n");    
          UDP_EP_CLR_FLAG(0, AT91C_UDP_RX_DATA_BK1);    /* Notify USB peripheral device that data have been read */
        USB_State.tx_len[0] = 0;    /* Stop Tx transfer */
    }
        
    /* Host get data from device complete */
    if(AT91C_UDP_TXCOMP & csr)
    {    
          DBG_OUT("ISR Tx Comp\r\n");
          
          /* The previous message received was SET_ADDR now that the computer ACK our send_null(),
        we can set this address for real */
        if(USB_State.dev_addr > 0)
        {    
              DBG_OUT("ISR: Set new address!\r\n");
              
              AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN | USB_State.dev_addr;    /* Set specified usb address in the controller */
            AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;    /* Tell the controller that we are in addressed mode now */
            USB_State.dev_addr = 0;
        }
        
        /* Send the following data */
         if(USB_State.tx_len[0] > 0 && USB_State.tx_data[0] != NULL)
            UDP_EP_Write(0, USB_State.tx_data[0], USB_State.tx_len[0]);    /* Send data */
        UDP_EP_CLR_FLAG(0, AT91C_UDP_TXCOMP);    /* Reset Tx complete */
    }
    
    if(AT91C_UDP_ISOERROR & csr)
    {    
          DBG_OUT("ISR EP0 ISO Err\r\n");
        UDP_EP_CLR_FLAG(0, AT91C_UDP_FORCESTALL | AT91C_UDP_ISOERROR);
    }
}

/*******************************************************************************
Write data to endpoint
*******************************************************************************/
void UDP_EP_Write(UINT8 ep, void *data, INT len)
{    
      P_UINT8 ptr;
      
      /* Get actual endpoint transfer size */
    UINT32 p_size = USB_State.ep_size[ep];

      /* If there is more data than can fit in a single packet, queue the rest up. */
      if(len > p_size)
    {
        len -= p_size;
        USB_State.tx_data[ep] = (P_UINT8)data + p_size;
        USB_State.tx_len[ep] = len;
      }
    else
    {
        p_size = len;
        USB_State.tx_data[ep] = NULL;
        USB_State.tx_len[ep] = 0;
      }
    
    DBG_OUT("UDP_EP_Write: Send %d bytes: ", p_size);
    
    UDP_EP_SET_FLAG(ep, AT91C_UDP_DIR);
    
    while(AT91C_BASE_UDP->UDP_CSR[ep] & AT91C_UDP_TXPKTRDY);
    
    /* Push a packet into the USB FIFO, and tell the controller to send. */
    ptr = (P_UINT8)data;
      while(p_size--)
        AT91C_UDP_FDR[ep] = *ptr++;
    
    UDP_EP_SET_FLAG(ep, AT91C_UDP_TXPKTRDY);
    
    if(AT91C_BASE_UDP->UDP_CSR[ep] & AT91C_UDP_TXCOMP)
        UDP_EP_CLR_FLAG(ep, AT91C_UDP_TXCOMP);
}

/*******************************************************************************
Stall endpoint
*******************************************************************************/
void UDP_EP_Stall(UINT8 ep)
{
      AT91C_BASE_UDP->UDP_CSR[ep] |= AT91C_UDP_FORCESTALL;
}

if(req_type & USB_BMREQUEST_DIR_DEV_TO_HOST)
          UDP_EP_SET_FLAG(0, AT91C_UDP_DIR);    /* Set IN direction for endpoint */

/* Notify USB peripheral device that data have been read */
    UDP_EP_CLR_FLAG(0, AT91C_UDP_RXSETUP);

    AT91C_BASE_AIC->AIC_ICCR  = 1 << AT91C_ID_UDP;

/* Init ISR */
     AT91C_BASE_AIC->AIC_IDCR = 1 << AT91C_ID_UDP;    /* Ensure interrupts are disabled before init */
     AT91C_BASE_AIC->AIC_SVR[AT91C_ID_UDP] =(UINT32)ISR_Handler;
     AT91C_BASE_AIC->AIC_SMR[AT91C_ID_UDP] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL |
                                               AT91C_AIC_PRIOR_LOWEST;

CHAR DBG_Buf[2048] = {0, };
int putchar(int c)
{    
       static INT idx = 0;
     P_CHAR ptr = DBG_Buf + idx++;
     *ptr = (CHAR)c;
     if(idx > 2048)
           idx = 0;
     return c;    
}

    if(AT91C_BASE_UDP->UDP_CSR[ep] & AT91C_UDP_TXCOMP)
        UDP_EP_CLR_FLAG(ep, AT91C_UDP_TXCOMP);

case USB_REQUEST_SET_ADDRESS:
                      DBG_OUT("SetAddress: %d.", w_val);
                      
                    USB_State.dev_addr = w_val;    /* Store new address */
                    UDP_EP_Write(0, 0, 0);    /* Acked to host - send zero packet */
                    
                    /* If the address change is to 0, do it immediately. */
                    if(!w_val)
                    {
                        AT91C_BASE_UDP->UDP_FADDR = AT91C_UDP_FEN;
                          AT91C_BASE_UDP->UDP_GLBSTATE = AT91C_UDP_FADDEN;
                    }
                      break;

    w_val = (AT91C_BASE_UDP->UDP_FDR[0] & 0xFF);
    w_val = (AT91C_BASE_UDP->UDP_FDR[0] << 8);

// \brief  Clear flags in the UDP_CSR register and waits for synchronization
// \param  pUsb      Pointer to a S_usb instance
// \param  bEndpoint Index of endpoint
// \param  dFlags    Flags to clear
#define UDP_CLEAREPFLAGS(pUsb, bEndpoint, dFlags) { \
    while (!ISCLEARED(UDP_GetDriverInterface(pUsb)->UDP_CSR[bEndpoint], dFlags)) \
        CLEAR(UDP_GetDriverInterface(pUsb)->UDP_CSR[bEndpoint], dFlags); \
}

/* Clear flags of UDP UDP_CSR register and waits for synchronization */
#define UDP_EP_CLR_FLAG(ep, f) { AT91C_BASE_UDP->UDP_CSR[ep] &= ~(f); while(AT91C_BASE_UDP->UDP_CSR[ep] & (f)); }

/* Set flags of UDP UDP_CSR register and waits for synchronization */
#define UDP_EP_SET_FLAG(ep, f) { AT91C_BASE_UDP->UDP_CSR[ep] |= (f); while((AT91C_BASE_UDP->UDP_CSR[ep] & (f)) != (f)); }

///
/// !Macros
/// - CLEAR_CSR
/// - SET_CSR

/// Bitmap for all status bits in CSR.
#define REG_NO_EFFECT_1_ALL      UDP_CSR_RX_DATA_BK0 | UDP_CSR_RX_DATA_BK1 \
                                |UDP_CSR_STALLSENT   | UDP_CSR_RXSETUP \
                                |UDP_CSR_TXCOMP

/// Clears the specified bit(s) in the UDP_CSR register.
/// \param endpoint The endpoint number of the CSR to process.
/// \param flags The bitmap to set to 1.
#define SET_CSR(endpoint, flags) \
    { \
        volatile unsigned int reg; \
        reg = UDP_CSR(UDP_BASE,endpoint); \
        reg |= REG_NO_EFFECT_1_ALL; \
        reg |= (flags); \
        UDP_CSR(UDP_BASE,endpoint) = reg; \
        while ( (UDP_CSR(UDP_BASE,endpoint) & (flags)) != (flags)); \
    }

/* Endpoint status setup */
typedef struct __UDP_EP_STATUS
{    
      INT size;        /* EP FIFO size */
    UINT32 type;    /* EP type (for store in CSR register) */
    UINT32 imask;    /* Interrupt flag in the IMR register (for enable/disable interrupt) */
    UINT32 banks;    /* Current receive bank for OUT endpoint, number of TX FIFO's for IN endpoint */
    
    P_UINT8 data;    /* Data buffer pointer */
    INT len;        /* Data size in buffer */
    INT inbuf;        /* For RX data count of buffered data */
    void (*fcbk)(void);    /* Optional transfer complete callback function */
    
} UDP_EP_STATUS, *P_UDP_EP_STATUS;

/* Receive Data from host host complete */
    if((AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1) & csr)
    {    
        DBG_OUT("CSR%d RX: ", ep);
        if(p_eps->data)    /* Endpoint is in read state */
        {    
              if(p_eps->inbuf > 0)    /* Old EP FIFO not be fully readed */
                  cnt = p_eps->inbuf;
            else
                  cnt = (AT91C_UDP_RXBYTECNT & csr) >> 16;    /* Get data counter */
            
            if(p_eps->len >= cnt)    /* Room for new data exist */
            {
                p_eps->len -= cnt;    /* Add data to be readed */
                for(i = 0; i < cnt; i++)    /* Read new data */
                    *p_eps->data++ = AT91C_BASE_UDP->UDP_FDR[ep];
                p_eps->inbuf = 0;    /* No data in FIFO */
                ClrRxFlag(ep, p_eps);    /* Notify USB peripheral device that data have been read */
            }
            else    /* No room for all received bank */
            {    
                  p_eps->inbuf = cnt - p_eps->len;    /* Store number of bytes in EP FIFO */
                for(i = 0; i < p_eps->len; i++)    /* Read new data */
                    *p_eps->data++ = AT91C_BASE_UDP->UDP_FDR[ep];
                p_eps->len = 0;
            }
            
            /* Check read complete */
            if(!p_eps->len || cnt < p_eps->size)    /* OK */
            {
                p_eps->data = NULL;
                AT91C_BASE_UDP->UDP_IDR = p_eps->imask;    /* disable interrupt */
                if(p_eps->fcbk)    /* Call Rx Complete application callback */
                    p_eps->fcbk();
            }
        }
        else    /* Data buffer not set - application not wating data */
        {    
              DBG_OUT("NAK! Data buffer not set.\r\n");
            AT91C_BASE_UDP->UDP_IDR = p_eps->imask;    
        }
    }

/*******************************************************************************
Read data from endpoint
*******************************************************************************/
INT UDP_EP_Read(UINT8 ep, void *data, INT len, void (*fcbk)(void))
{    
      P_UDP_EP_STATUS p_eps;
        
    DBG_OUT("UDP_EP%d_Read: ", ep);
    
    if(!g_State.curr_cfg)    /* Check UDP device state */
    {    
          DBG_OUT("Device not configured!\r\n");
          return FALSE;    /* Not configured */
    }
    
    if(!ep || ep >= UDP_NUM_EP)    /* Check enpoint number */
    {    
          DBG_OUT("Invalid number %d!\r\n", ep);
          return FALSE;
    }
    
    p_eps = g_State.ep[ep];    /* Get endpoint status */
    if(!p_eps)    /* Check endpoint parameters */
    {    
          DBG_OUT("ep not inited!\r\n");
        return FALSE;
    }
    
    if(p_eps->data)
    {    
          DBG_OUT("ep busy!\r\n");
        return FALSE;
    }
    
    /* Set data fields */
    p_eps->data = data;
    p_eps->len = len;
    p_eps->fcbk = fcbk;
    
    AT91C_BASE_UDP->UDP_IER = p_eps->imask;        /* Enable interrupts from endpoint */
    DBG_OUT("\r\n");
    return TRUE;    /* Success */
}