ROCKET_CLK_OUT <= rocket_clk;
    RFF_DATA <= RTFIFO_CROSS_DataOut;
    RFF_WR_REQ <= RTFIFO_CROSS_RdAck;
    
  ROCKET_FIFO_I : entity fifo_generator_v4_3_4096
    port map
  (
    clk => rocket_clk,
    din => user_IP2RFIFO_Data,
    rd_en => Rocket_Fifo_RdReq,
    rst => ipif_Bus2IP_Reset,
    wr_en => user_IP2RFIFO_WrReq,
    almost_full => Rocket_Fifo_Almost_Full,
    data_count => Rocket_Fifo_DataCnt,
    dout => Rocket_Fifo_DataOut,
    empty => Rocket_Fifo_Empty,
    full => Rocket_Fifo_Full,
    valid => Rocket_Fifo_RdAck );
  
  Rocket_Fifo_RdReq <= not( Rocket_Fifo_Empty ) and not( RTFIFO_CROSS_Almost_Full or RTFIFO_CROSS_Full );
  
    Rocket_Almost_Full <= Rocket_Fifo_DataCnt(11) and Rocket_Fifo_DataCnt(10) and Rocket_Fifo_DataCnt(9) and Rocket_Fifo_DataCnt(8) and Rocket_Fifo_DataCnt(7);

    -- FIFO для развязки частоты ( 64x9 )
    ROCKET_FIFO_CROSS_I : entity fifo_generator_v4_3_64x9
    port map
    (
        din    => Rocket_Fifo_DataOut,
        rd_clk    => WFF_WR_CLK_2,
        rd_en    => RTFIFO_CROSS_Rd_En,
        rst    => ipif_Bus2IP_Reset,
        wr_clk    => rocket_clk,
        wr_en    => Rocket_Fifo_RdAck,
        dout    => RTFIFO_CROSS_DataOut,
--    wr_data_count => RTFIFO_CROSS_DataCnt,
        empty    => RTFIFO_CROSS_Empty,
        full    => RTFIFO_CROSS_Full,
        almost_full    => RTFIFO_CROSS_Almost_Full,
        valid    => RTFIFO_CROSS_RdAck );
    
  RTFIFO_CROSS_Rd_En <= not( RTFIFO_CROSS_Empty ) and not( RFF_FULL or RFF_FULL_2 );