#include "batch_conf.h"
batch_BEGIN(main_tbl)
batch_OR(&(RCC->CR),RCC_CR_HSEON)
batch_WAIT(&(RCC->CR), RCC_CR_HSERDY)
batch_WRITE(&(RCC->CFGR),RCC_CFGR_PLLMULL_0 |RCC_CFGR_PLLSRC)
batch_OR(&(RCC->CR), RCC_CR_PLLON)
batch_WAIT(&(RCC->CR), RCC_CR_PLLRDY)
batch_OR(&(RCC->CFGR),2)
batch_END;

batch_conf(main_tbl, NULL);

RCC->CR |= RCC_CR_HSEON;
while(!(RCC->CR & RCC_CR_HSERDY));
RCC->CFGR = RCC_CFGR_PLLMULL_0 |RCC_CFGR_PLLSRC ;
RCC->CR |= RCC_CR_PLLON;
while(!(RCC->CR & RCC_CR_PLLRDY));
RCC->CFGR |= 2;

////////////////////////////////////////////////////////////////////////////////
// TRF7960_X_drv.h //////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
#ifndef TRF7960_X_DRV_H
#define TRF7960_X_DRV_H

////////////////////////////////////////////////////////////////////////////////
#include <bsp.h>

////////////////////////////////////////////////////////////////////////////////
typedef BSP_U08 TRF796x_U08;
typedef BSP_U16 TRF796x_U16;
typedef BSP_U32 TRF796x_U32;
typedef BSP_BOOL TRF796x_BOOL;
typedef BSP_U08 TRF796x_DATA;

////////////////////////////////////////////////////////////////////////////////
#define TRF796x_X_Init() BspTrf796x_Init()
#define TRF796x_X_Enable() BspTrf796x_Enable()
#define TRF796x_X_Disable() BspTrf796x_Disable()
#define TRF796x_X_IrqEnable() BspTrf796x_InterruptEnable()
#define TRF796x_X_IrqDisable() BspTrf796x_InterruptDisable()
#define TRF796x_X_TimerConfig( U08 ) BspTrf796x_TimerConfig( U08 )
#define TRF796x_X_TimerStart() BspTrf796x_TimerStart()
#define TRF796x_X_TimerStop() BspTrf796x_TimerStop()
#define TRF796x_X_Delay_mSec( U32 ) BspDelay_mSec( U32 )

#define TRF796x_DUMMY 0x00

////////////////////////////////////////////////////////////////////////////////
#pragma inline
void TRF796x_X_Command( const TRF796x_U08 Command )
{
// SLOA155 - TRF7960A Firmware Design Hints
// 7.7 SPI With SS Pin Only – Single-Byte Direct Commands
// Description
// All single byte direct commands need an additional CLK cycle to work.
// Workaround
// All direct command functions need to have an additional DATA_CLK cycle
// before Slave Select l line goes high.

BspSpiOpen();
BspSpiXfer08_Mode00( Command );
BspSpiXfer08_Mode00( TRF796x_DUMMY );
BspSpiClose();
}

////////////////////////////////////////////////////////////////////////////////
#pragma inline
TRF796x_U08 TRF796x_X_Read( const TRF796x_U08 Addr )
{
TRF796x_U08 Data;

////////////////////////////////////////////////////////////////////////////
BspSpiOpen();
BspSpiXfer08_Mode00( Addr );
Data = BspSpiXfer08_Mode01( TRF796x_DUMMY );
BspSpiClose();

return( Data );
}

////////////////////////////////////////////////////////////////////////////////
#pragma inline
void TRF796x_X_ReadBurst( const TRF796x_U08 Addr,
TRF796x_U08 * pData,
TRF796x_U08 Count )
{
BspSpiOpen();
BspSpiXfer08_Mode00( Addr );
while( Count-- )
{
*pData++ = BspSpiXfer08_Mode01( TRF796x_DUMMY );
}
BspSpiClose();
}

////////////////////////////////////////////////////////////////////////////////
#pragma inline
void TRF796x_X_Write( const TRF796x_U08 Addr,
const TRF796x_U08 Data )
{
////////////////////////////////////////////////////////////////////////////
BspSpiOpen();
BspSpiXfer08_Mode00( Addr );
BspSpiXfer08_Mode00( Data );
BspSpiClose();
}

////////////////////////////////////////////////////////////////////////////////
#pragma inline
void TRF796x_X_WriteBurst( const TRF796x_U08 Addr,
TRF796x_U08 * pData,
TRF796x_U08 Count )
{
// SLOA155 - TRF7960A Firmware Design Hints
// 7.2 SPI With SS Pin Only – Direct Commands
// Description
// Serial interface with SS pin only, the direct commands are not executed
// if they are the last operation in the SPI communication. In the SPI interface
// with SS pin the Stop condition clock pulse is missing (compared to
// the parallel interface and SPI without SS pin). Some operations are relying
// on this clock and they do not work as expected.
// Workaround
// If a direct command is the last operation in the SPI communication,
// the SS pin goes high. Afterward, an additional clock pulse has to be sent.

BspSpiOpen();
BspSpiXfer08_Mode00( Addr );
while( Count-- )
{
BspSpiXfer08_Mode00( *pData++ );
}
BspSpiClose();
BspSpiXfer08_Mode00( TRF796x_DUMMY );
}

#endif //TRF7960_X_DRV_H

movw    r1, low(REG)
movt    r1, high(REG)
movw    r2, low(VALUE)
movt    r2, high(VALUE)
str r2, [r1, #0]

switch(cmd) {
case cm_a: cm_a_func(); break;
case cm_b: cm_b_func(); break;
case cm_c: cm_c_func(); break;
case cm_d: cm_d_func(); break;
}

struct {
    uint8_t cmd;
    void (*pfunc)(void);
} cmdtable[] = {
    {cm_a, cm_a_func},
    {cm_b, cm_b_func},
    {cm_c, cm_c_func},
    {cm_d, cm_d_func},
    {0, 0}
};

            do{
                case bcmd_Wait_MSK:
                    result = 1;
                    continue;
                case bcmd_Wait_nMSK:
                    result = 0;
                    continue;
            }while(0);