asm volatile (
                "LDR R1,=0x08008000        \n"
                "MSR MSP, R1            \n"
            :
            :
            :
            );

SP_0x20003858 MSP_0x08008000 PSP_0x20003858 LR_0xFFFFFFFF PC_0x08002660        
CF_0x00040000 HF_0x00000000 DF_0x0000000A AF_0x00000000                        
MA_0xE000ED34 BA_0xE000ED38

/*
* main.c
*
* Created on: 01 окт. 2013 г.
* Author: jura
*/


#include <stm32f4xx.h>

GPIO_InitTypeDef GPIO_InitStructure;

void Delay(__IO uint32_t nCount)
{
while(nCount--)
{
}
}



int main(void)
{


/* включаем тактирование порта D */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);

/* конфигурируем выводы PD12, PD13, PD14 и PD15 */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12 | GPIO_Pin_13| GPIO_Pin_14| GPIO_Pin_15;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
GPIO_Init(GPIOD, &GPIO_InitStructure);

while (1)
{
/* зажигаем зеленый (PD12) */
GPIO_SetBits(GPIOD, GPIO_Pin_12);

/* Задержка */
Delay(0x3FFFFF);

/* зажигаем оранжевый (PD13) */
GPIO_SetBits(GPIOD, GPIO_Pin_13);

/* Задержка */
Delay(0x3FFFFF);

/* зажигаем красный (PD14) */
GPIO_SetBits(GPIOD, GPIO_Pin_14);

/* Задержка */
Delay(0x3FFFFF);

/* зажигаем синий (PD15) */
GPIO_SetBits(GPIOD, GPIO_Pin_15);

/* Задержка */
Delay(0x7FFFFF);

/* сбрасываем все 4-ре */
GPIO_ResetBits(GPIOD, GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15);

/* Задержка */
Delay(0xFFFFFF);
}
}

OS_PROCESS void TProc4::exec()
{//init_stack_frame();
for(;;)
{
for(;;)
{res_table.uregs[104]=Proc4.stack_slack();
GreenLED::On();
sleep(50);
GreenLED::Off();
sleep(950);
;
}
}
}

diff --git a/src/jtag/hla/hla_interface.c b/src/jtag/hla/hla_interface.c
index 0176a48..99d0229 100644
--- a/src/jtag/hla/hla_interface.c
+++ b/src/jtag/hla/hla_interface.c
@@ -137,6 +137,11 @@ int hl_interface_init_reset(void)
jtag_add_reset(0, 1);
hl_if.layout->api->assert_srst(hl_if.fd, 0);
}
+ else
+ {
+ jtag_add_reset(0, 0);
+ hl_if.layout->api->assert_srst(hl_if.fd, 1);
+ }

return ERROR_OK;
}
diff --git a/src/target/hla_target.c b/src/target/hla_target.c
index a65ba80..cd7a127 100644
--- a/src/target/hla_target.c
+++ b/src/target/hla_target.c
@@ -484,6 +484,8 @@ static int adapter_poll(struct target *target)

LOG_DEBUG("halted: PC: 0x%08x", buf_get_u32(armv7m->arm.pc->value, 0, 32));
}
+ else
+ target->state = state;

return ERROR_OK;
}

> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800232c psp: 0x20003124
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800232c psp: 0x20003124
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800232c psp: 0x20003124
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0800232c psp: 0x20003124
> resume

> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x080004e0 msp: 0x2001bfd0
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x080004e4 msp: 0x2001bfd0
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x0800051c msp: 0x2001bfd0
> resume
> halt
target state: halted
target halted due to debug-request, current mode: Thread
xPSR: 0x21000000 pc: 0x08000506 msp: 0x2001bfd0

asm volatile (
"TST LR, #0x4 \n" // Test EXC_RETURN number in LR bit 2"
"ITTEE EQ \n" // if zero (equal) then
"MRSEQ R4, MSP \n" // Main Stack was used, put MSP in R0
"LDREQ R0,[R4,#24] \n" // Get stacked PC from stack
"MRSNE R4, PSP \n" // else, Process Stack was used, put PSP in R0
"LDRNE R0,[R4,#24] \n" // Get stacked PC from stack
"MRS R1, MSP \n"
"MRS R2, PSP \n"
"MOV R3, LR \n"
"deadend1: \n"
"B deadend1 \n"// ; Infinite loop
:
:
:
);

typedef struct
{
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r12;
    uint32_t lr;   // LR (R14)
    uint32_t pc;
    uint32_t xpsr;
} stack_frame_t;

void Hard_Fault_Handler(uint32_t stacked_reg[])
{
DBGS_STR("In HardFault_Handler:");
DBGS_MSG("SCB->HFSR = 0x%08X", SCB->HFSR);

if ((SCB->HFSR & (1 << 30)) != 0)
{
DBGS_STR(" Forced Hard Fault");
DBGS_MSG(" SCB->CFSR= 0x%08X", SCB->CFSR );
if((SCB->CFSR & 0xFFFF0000) != 0)
{
uint32_t CFSRValue = SCB->CFSR >> 16; // right shift to lsb
DBGS_STR(" Usage fault:");
if((CFSRValue & (1 << 9)) != 0) {
DBGS_STR(" Divide by zero");
}
if((CFSRValue & (1 << 8)) != 0) {
DBGS_STR(" Unaligned");
}
if((CFSRValue & (1 << 3)) != 0) {
DBGS_STR(" NOCP");
}
if((CFSRValue & (1 << 2)) != 0) {
DBGS_STR(" INVPC");
}
if((CFSRValue & (1 << 1)) != 0) {
DBGS_STR(" INVSTATE");
}
if((CFSRValue & (1 << 0)) != 0) {
DBGS_STR(" UNDEFINSTR");
}
}
}

DBGS_MSG("R0 = 0x%08X", stacked_reg[0]);
DBGS_MSG("R1 = 0x%08X", stacked_reg[1]);
DBGS_MSG("R2 = 0x%08X", stacked_reg[2]);
DBGS_MSG("R3 = 0x%08X", stacked_reg[3]);
DBGS_MSG("R12= 0x%08X", stacked_reg[4]);
DBGS_MSG("LR = 0x%08X", stacked_reg[5]);
DBGS_MSG("PC = 0x%08X", stacked_reg[6]);
DBGS_MSG("PSR= 0x%08X", stacked_reg[7]);

for(;;)
{
UART0_Put();
}
}

__asm void HardFault_Handler(void)
{
TST lr, #4 // Test for MSP or PSP
ITE EQ
MRSEQ r0, MSP
MRSNE r0, PSP
B __cpp(Hard_Fault_Handler)
}