void Data_StartNextTransfer( void ) @ ".itcmram"
{..................}

Warning[Lp005]: placement includes a mix of sections with content (example "ro code section .itcmram in USBH.o") and sections without content  D:\WORK\C\ARM\PA-20 v4 new\EWARM\stm32f745xx_flash_sram.icf 54
(example "rw code section .itcmram in DataTask.o symbols: [Data_StartNextTransfer]")
Warning[Lp006]: placement includes a mix of writable sections (example "rw code section .itcmram in DataTask.o symbols: [Data_StartNextTransfer]")  D:\WORK\C\ARM\PA-20 v4 new\EWARM\stm32f745xx_flash_sram.icf 54
and non-writable sections (example "ro code section .itcmram in USBH.o")

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__       = 0x080FFFFF;
define symbol __ICFEDIT_region_DTCMRAM_start__     = 0x20000000;
define symbol __ICFEDIT_region_DTCMRAM_end__       = 0x2000FFFF;
define symbol __ICFEDIT_region_SRAM1_start__     = 0x20010000;
define symbol __ICFEDIT_region_SRAM1_end__       = 0x2004BFFF;
define symbol __ICFEDIT_region_SRAM2_start__     = 0x2004C000;
define symbol __ICFEDIT_region_SRAM2_end__       = 0x2004FFFF;
define symbol __ICFEDIT_region_ITCMRAM_start__ = 0x00000000;
define symbol __ICFEDIT_region_ITCMRAM_end__   = 0x00003FFF;
define symbol __ICFEDIT_region_SRAM_start__    = 0x60000000;
define symbol __ICFEDIT_region_SRAM_end__      = 0x601FFFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/


define memory mem with size = 4G;
define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region DTCMRAM_region  = mem:[from __ICFEDIT_region_DTCMRAM_start__   to __ICFEDIT_region_DTCMRAM_end__];
define region SRAM1_region    = mem:[from __ICFEDIT_region_SRAM1_start__   to __ICFEDIT_region_SRAM1_end__];
define region SRAM2_region    = mem:[from __ICFEDIT_region_SRAM2_start__   to __ICFEDIT_region_SRAM2_end__];
define region SRAM_region     = mem:[from __ICFEDIT_region_SRAM_start__   to __ICFEDIT_region_SRAM_end__];
define region ITCMRAM_region  = mem:[from __ICFEDIT_region_ITCMRAM_start__ to __ICFEDIT_region_ITCMRAM_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
define block SRAM      with alignment = 8 { section .sram };
define block SRAM2     with alignment = 8 { section .sram2 };
define block DTCMRAM   with alignment = 8 { section .dtcmram };
define block ITCMRAM   with alignment = 8 { section .itcmram };

initialize by copy { readwrite, section .itcmram };
do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in ROM_region     { readonly };
place in SRAM1_region   { readwrite,  
            block HEAP,
                        block CSTACK};
place in SRAM_region    { block SRAM };
place in ITCMRAM_region {block ITCMRAM };
place in DTCMRAM_region {block DTCMRAM };
place in SRAM2_region   {block SRAM2 };

Error[Lc037]: ambiguous section match: "zi section .bss in ADC.o symbols: [ADCCurrentLimits, ADC_Flags]" matches more than one pattern

place in ITCMRAM_region {readonly section .itcmram, readwrite section .itcmram };

define memory mem with size = 4G;
define region FLASH_regionA = mem:[from 0x00004000 to 0x000FFFFF];
define region RAM_regionA = mem:[from 0x20000000 size 0x3FFE0];
define region RAM_regionB = mem:[from 0x2003FFE0 size 0x00020];
define region ROM_region = mem:[from 0x02000000 to 0x02FFFFFF];
define region EEPROM_region = mem:[from 0x400AF000 size 0x1000];

define block CSTACK with alignment = 8, size = 0x000 {};
define block HEAP with alignment = 8, size = 0x000 {};

initialize by copy {rw};
initialize by copy {section .textRAM};
do not initialize {section .noinit};
do not initialize {section .dma};
do not initialize {section .ethernet};
do not initialize {section .bssStk};
do not initialize {section .bssStkMain};
do not initialize {section .bssMemNoFill};
do not initialize {section .imonSave};

define block IMAGE_HEAD with fixed order {section .intvec, section .checksum,
section .codehead, section .intvecTail, section .codeSignature,
section .codebegin};
place in RAM_regionB {section .textRAM};
place in FLASH_regionA {ro, first block IMAGE_HEAD, last section .codetail};
place in RAM_regionA {section .BITBAND_RAM, section .dma, section .ethernet};
place in RAM_regionA {rw, first block CSTACK, section .bssMemNoFill,
block HEAP};

@ ".itcmram"

place in ITCMRAM_region {section .itcmram, section .textrw };