int flash_page_erase(uint32_t page_address) // page_address not page_number
{
    static const uint32_t FPEC_KEY1 = 0x45670123;
    static const uint32_t FPEC_KEY2 = 0xCDEF89AB;

    int res;

    ENTER_CRITICAL_SECTION();
    {
        FPEC->KEYR = FPEC_KEY1;     // Authorize the FPEC Access
        FPEC->KEYR = FPEC_KEY2;

        while (FPEC->SR & FPEC_SR_BSY) {;}

        FPEC->SR = FPEC_SR_EOP | FPEC_SR_WRPRTERR | FPEC_SR_PGERR; // clr bits by writing 1
        FPEC->CR = FPEC_CR_PER;                // page erase operation w/o fpec interrupts
        FPEC->AR = page_address;               // page address
        FPEC->CR = FPEC_CR_STRT | FPEC_CR_PER; // start operation    
        FPEC->SR;                               // according to errata: must be dummy cycle before polling BSY after START operation

        while (FPEC->SR & FPEC_SR_BSY) {;}

        res = ((FPEC->SR & FPEC_SR_EOP)  != 0);// EOP is asserted at the end of each successful program or erase operation

        FPEC->CR = FPEC_CR_LOCK;  // Set the Lock Bit to lock the FPEC and the FCR
    }
    LEAVE_CRITICAL_SECTION();

    return (res);
}

#ifndef _ATOMIC_H_
#define _ATOMIC_H_

#ifdef __cplusplus
  extern "C" {
#endif

//=============================================================================
static __asm __inline uint32_t get_interrupt_state(void)
{
    mrs r0, primask
    bx lr
}

//=============================================================================
static __asm __inline void set_interrupt_state(uint32_t status)
{
    msr primask, r0
    bx lr
}

#define ENTER_CRITICAL_SECTION()  do {uint32_t sreg_temp = get_interrupt_state(); __disable_irq()
#define LEAVE_CRITICAL_SECTION()  set_interrupt_state(sreg_temp);} while (0)

#ifdef __cplusplus
  }
#endif

#endif

  RCC_HSEConfig(RCC_HSE_ON);  
  RCC_WaitForHSEStartUp();
  
  RCC_HCLKConfig(RCC_SYSCLK_Div1);
  RCC_PLLConfig(RCC_PREDIV1_Source_HSE,RCC_PLLMul_4);
  RCC_PCLK1Config(RCC_HCLK_Div1);
  RCC_PCLK2Config(RCC_HCLK_Div1);
  
  RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  RCC_PLLCmd(ENABLE);
  
  //ïîäàåì òàêòîâûé ñèãíàë íà ïîðòû
  //RCC_AHBPeriphClockCmd ( );  
  
  RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_AFIO, ENABLE);
  
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_I2C1, ENABLE);  
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2,ENABLE);
  RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
  
  SystemInit();

  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;  
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_Pin =GPIO_Pin_2;
  GPIO_Init(GPIOA, &GPIO_InitStructure);
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;  
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_Pin =GPIO_Pin_3;
  GPIO_Init(GPIOA, &GPIO_InitStructure);
  
  NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  NVIC_Init(&NVIC_InitStructure);
  
  USART_InitStructure.USART_BaudRate = 9600;
  USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  USART_InitStructure.USART_StopBits = USART_StopBits_1;
  USART_InitStructure.USART_Parity = USART_Parity_Even;
  USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  USART_Init(USART2, &USART_InitStructure);  

  USART_ClearFlag(USART2,USART_FLAG_TC);  
  USART_ClearITPendingBit(USART2,USART_IT_TC);
  
  USART_ITConfig(USART2, USART_IT_TC, ENABLE);

  USART_Cmd(USART2, ENABLE);

void USART2_IRQHandler(void)
{
  if(USART_GetITStatus(USART2,USART_IT_RXNE)==SET)  
  {
    USART_ClearFlag(USART2,USART_FLAG_RXNE);    
    USART_ClearITPendingBit(USART2,USART_IT_RXNE);    

  }

  if(USART_GetITStatus(USART2,USART_IT_TC)==SET)  
  {
    if (GPIO_ReadOutputDataBit(GPIOC,GPIO_Pin_8) == 1) GPIO_ResetBits(GPIOC,GPIO_Pin_8);
    else GPIO_SetBits(GPIOC,GPIO_Pin_8);
    
    USART_ClearFlag(USART2,USART_FLAG_TC);    
    USART_ClearITPendingBit(USART2,USART_IT_TC);
  }
}

  RCC->CFGR &= ~RCC_CFGR_ADCPRE;
  RCC->CFGR |= RCC_CFGR_ADCPRE_DIV2;
  RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
  ADC1->CR1=ADC_CR1_SCAN|ADC_CR1_JAUTO;
  ADC1->CR2=ADC_CR2_ADON|ADC_CR2_CONT|ADC_CR2_JSWSTART;
  ADC1->SMPR2=ADC_SMPR2_SMP4_1|ADC_SMPR2_SMP5_1;
  ADC1->JSQR=ADC_JSQR_JL_0|ADC_JSQR_JSQ1_2|ADC_JSQR_JSQ2_0|ADC_JSQR_JSQ2_2;
  //// калибровка АЦП ////
  ADC1->CR2 |= ADC_CR2_RSTCAL;
  while ((ADC1->CR2 & ADC_CR2_RSTCAL) == ADC_CR2_RSTCAL);
  ADC1->CR2 |= ADC_CR2_CAL;
  while ((ADC1->CR2 & ADC_CR2_RSTCAL) == ADC_CR2_CAL);
  ADC1->CR2=ADC_CR2_ADON;

STM32F100.axf: Error: L6218E: Undefined symbol SystemInit (referred from startup_stm32f10x_ld_vl.o).