SPI1_DR = 0x05;
while ((SPI1_SR & (1 << 1)) == 0) { /* wait for TXE */ }
while ((SPI1_SR & (1 << 0)) == 0) { /* wait for RXNE */ }
while ((SPI1_SR & (1 << 7)) != 0) { /* wait for !BUSY */ }
CS_DEASSERT();
return SPI1_DR;

void AnaDAC_send(uint16_t data)
{
  ANAS->CR1 &= ~SPI_CR1_SPE;        // запретить SPI
  ANAS->CR1 |= SPI_CR1_CPOL;        // данные стабильные на срезе \_
  ANAS->CR1 |= SPI_CR1_SPE;            // разрешить SPI

  ANSYN_ON();                        // \__
  ANAS->DR = (uint8_t)(data >> 8);    // послать биты 15 - 8
  while (!(ANAS->SR & SPI_SR_TXE));    // ждать освобождение буфера
  ANAS->DR = (uint8_t)(data);        // послать биты 7 - 0
  while (!(ANAS->SR & SPI_SR_TXE));    // ждать освобождение буфера
  // while (!(ANAS->SR & SPI_SR_RXNE)); // ждать конец передачи - нельзя!
  while (ANAS->SR & SPI_SR_BSY);    // ждать освобождение приемопередатчика
  ANSYN_OFF();                        //            __/

  ANAS->CR1 &= ~SPI_CR1_SPE;        // запретить SPI
  ANAS->CR1 &= ~SPI_CR1_CPOL;        // данные стабильные на фронте _/
  ANAS->CR1 |= SPI_CR1_SPE;            // разрешить SPI
}

//---------------------------------------------------------------------------
// LED & BUTTON
//---------------------------------------------------------------------------
SPI_NSS_bit = 1;
for(i = 0; i < 3; i++) __NOP();
SPI_OE_bit = 0;
SPI_NSS_bit = 0;

SPI2->CR2 =
(0 << SPI_CR2_RXNEIE)
| (0 << SPI_CR2_TXDMAEN)
| (0 << SPI_CR2_RXDMAEN)
| (1 << SPI_CR2_SSOE);

DMA1_Stream4->CR =
(0 << DMA_SCR_PL)
| (0 << DMA_SCR_CHSEL)
| (1 << DMA_SCR_MINC)
| (1 << DMA_SCR_DIR)
| (0 << DMA_SCR_EN);

DMA1_Stream3->CR =
(0 << DMA_SCR_PL)
| (0 << DMA_SCR_CHSEL)
| (1 << DMA_SCR_MINC)
| (0 << DMA_SCR_DIR)
| (0 << DMA_SCR_EN);

DMA1->LIFCR = (0x3D << 22);
DMA1->HIFCR = (0x3D << 0);

for(i = 0; i < 10; i++) __NOP();

DMA1_Stream3->PAR = (DWORD)&SPI2->DR;
DMA1_Stream3->M0AR = (DWORD)spi_rx;
DMA1_Stream3->NDTR = SPI_SIZE;
DMA1_Stream3->CR =
(0 << DMA_SCR_PL)
| (0 << DMA_SCR_CHSEL)
| (1 << DMA_SCR_MINC)
| (0 << DMA_SCR_DIR)
| (1 << DMA_SCR_EN);

DMA1_Stream4->PAR = (DWORD)&SPI2->DR;
DMA1_Stream4->M0AR = (DWORD)spi_tx;
DMA1_Stream4->NDTR = SPI_SIZE;
DMA1_Stream4->CR =
(0 << DMA_SCR_PL)
| (0 << DMA_SCR_CHSEL)
| (1 << DMA_SCR_MINC)
| (1 << DMA_SCR_DIR)
| (1 << DMA_SCR_EN);

for(i = 0; i < 10; i++) __NOP();

SPI2->CR2 =
(0 << SPI_CR2_RXNEIE)
| (1 << SPI_CR2_TXDMAEN)
| (1 << SPI_CR2_RXDMAEN)
| (1 << SPI_CR2_SSOE);

BYTE spi_send_byte(const BYTE data)
{
    BYTE spib;
    while((SPI3->SR & (1 << SPI_SR_TXE)) == 0);
    SPI3->DR = data;
    while((SPI3->SR & (1 << SPI_SR_RXNE)) == 0);
    spib = SPI3->DR;
    return spib;
}

HAL_StatusTypeDef SPI_WaitOnFlagTimeout(SPI_HandleTypeDef *hspi, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
{
uint32_t start = jiffies;
while(__HAL_SPI_GET_FLAG(hspi, Flag) == Status){
if(jiffies - start >= Timeout){
return -HAL_TIMEOUT;
}
}
return HAL_OK;
}
#if 0
/* This funtion is used to transmit and receive data
* with SPI1
* data --> data to be transmitted
* returns received value
*/
uint8_t SPI1_send(uint8_t data){

SPI1->DR = data; // write data to be transmitted to the SPI data register
while( !(SPI1->SR & SPI_I2S_FLAG_TXE) ); // wait until transmit complete
while( !(SPI1->SR & SPI_I2S_FLAG_RXNE) ); // wait until receive complete
while( SPI1->SR & SPI_I2S_FLAG_BSY ); // wait until SPI is not busy anymore
return SPI1->DR; // return received data from SPI data register
}
#endif

int SPI_Transmit1(SPI_HandleTypeDef *hspi, uint8_t* val, uint32_t timeout)
{
FlagStatus Status;
__HAL_SPI_ENABLE(hspi);
hspi->Instance->DR = *val;
Status = SPI_WaitOnFlagTimeout(hspi, SPI_FLAG_TXE, RESET, timeout);
if(HAL_OK != Status){
return Status;
}
Status = SPI_WaitOnFlagTimeout(hspi, SPI_FLAG_RXNE, RESET, timeout);
if(HAL_OK != Status){
return Status;
}
Status = SPI_WaitOnFlagTimeout(hspi, SPI_FLAG_BSY, SET, timeout);
*val = hspi->Instance->DR;
return Status;
}

int write_spi_reg(uint8_t chip_id, uint8_t reg_addr, uint8_t val)
{
SPI_HandleTypeDef* hspi;
uint8_t buf[SPI_WRITE_LEN];
uint8_t i;
uint8_t id;
GPIO_TypeDef* port;
uint16_t pin;

HAL_StatusTypeDef ret;


if(CHIPS_AMOUNT <= chip_id){
return -WRONG_PARAMETER;
}

hspi = hspi1;
id = 0
port = GPIOA;
pin = GPIO_PIN_4;


buf[0] = WR_SPI_CMD(id);
buf[1] = reg_addr;
buf[2] = val;

for(i = 0; i < SPI_WRITE_LEN; i++){
HAL_GPIO_WritePin(port, pin, 0);
short_delay(7);
ret = SPI_Transmit1(hspi, &buf[i], SPI_TIMEOUT);
HAL_GPIO_WritePin(port, pin, 1);
short_delay(7);

if(HAL_OK != ret){
responce_handle(ret);
return -ret;
}
}
return NO_ERROR;
}

int read_spi_reg(uint8_t chip_id, uint8_t reg_addr)
{
SPI_HandleTypeDef* hspi;
uint8_t buf[2];
uint8_t id;
HAL_StatusTypeDef ret;
GPIO_TypeDef* port;
uint16_t pin;
chip_interface_t* chip_if;



if(CHIPS_AMOUNT <= chip_id){
return;
}
hspi = hspi1;
id = 0
port = GPIOA;
pin = GPIO_PIN_4;

buf[0] = RD_SPI_CMD(id);
buf[1] = reg_addr;

HAL_GPIO_WritePin(port, pin, 0);
short_delay(7);
ret = SPI_Transmit1(hspi, &buf[0], SPI_TIMEOUT);

HAL_GPIO_WritePin(port, pin, 1);
short_delay(7);

HAL_GPIO_WritePin(port, pin, 0);
short_delay(7);
ret = SPI_Transmit1(hspi, &buf[1], SPI_TIMEOUT);
HAL_GPIO_WritePin(port, pin, 1);
short_delay(7);

if(HAL_OK != ret){
responce_handle(ret);
return (uint16_t) -1;
}

HAL_GPIO_WritePin(port, pin, 0);
short_delay(7);
ret = SPI_Transmit1(hspi, &buf[0], SPI_TIMEOUT);
HAL_GPIO_WritePin(port, pin, 1);
short_delay(7);

if(HAL_OK != ret){
responce_handle(ret);
}

return (uint32_t)buf[0];
}

#define PIN(PORT, PIN) GPIO##PORT, GPIO_PIN_##PIN

#define SPI1_CLK_PIN PIN(B, 3)
#define SPI1_MOSI_PIN PIN(A,7)
#define SPI1_MISO_PIN PIN(A, 6)
#define SPI1_SS_PIN PIN(A, 4)

#define SET_CLK1() HAL_GPIO_WritePin(SPI1_CLK_PIN, 1)
#define CLR_CLK1() HAL_GPIO_WritePin(SPI1_CLK_PIN, 0)

#define SET_MOSI1() HAL_GPIO_WritePin(SPI1_MOSI_PIN, 1)
#define CLR_MOSI1() HAL_GPIO_WritePin(SPI1_MOSI_PIN, 0)

#define GET_MISO1() HAL_GPIO_ReadPin(SPI1_MISO_PIN)

int SPI_Transmit1(SPI_HandleTypeDef *hspi, uint8_t* val, uint32_t timeout)
{
int i;
uint8_t res= 0, tmp = *val;
if(&hspi1 == hspi){
for(i = 0; i < 8; i++){
res <<= 1;
CLR_CLK1();
if(tmp & 0x80){
SET_MOSI1();
} else {
CLR_MOSI1();
}
res |= GET_MISO1();
SET_CLK1();
tmp <<= 1;
}
} else {
return SPI_Transmit1_hw(hspi, val, timeout);
}
*val = res;
return 0;
}